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3 points by spydez 5867 days ago | link | parent

Wow. Lisp and Verilog? Sounds interesting.

What are you doing? Building lisp machines on FPGAs?



2 points by almkglor 5867 days ago | link

err, no ^^;. Although I did read Lambda: the Ultimate Opcode, which was plenty darned interesting. http://repository.readscheme.org/ftp/papers/ai-lab-pubs/AIM-...

It's really more that Cadence uses Skill as the extension language for the IC design tools it has - their simulation scripting language is based on Skill. I've built quite a few tools with Cadence Skill, including my current favorite which transforms a simulation script that normally runs on one computer (and dependent on various paths etc. on that computer) into one which can run within a single directory on a target computer - a feat made almost trivial by Lisp-like languages. The major difficulty was with dynamically generated filenames, but all I needed to do is add a table-lookup function around each file reference argument.

I liked Skill and through it studied Lisp quite a bit. Sometimes I use Skill to generate Verilog code ^^, and I model state machines as:

  (input start stop)
  (output idle)
  (state IDLE
    (idle)
    (cond
      ((start)
        (RUNNING))
      (else
        (IDLE))))
  (state RUNNING
    (cond
      ((stop)
        (IDLE))
      (else
        (RUNNING))))
We could even conceptually model individual states as functions (as per lambda the ultimate goto), with inputs as functions (probably querying from the user) and outputs as displaying the output; it would thus be possible to write, at the very least, a state machine simulator in Skill, which would include a method of transforming the state machine into Verilog.

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